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This commit is contained in:
Edith Boles 2025-05-13 20:21:18 -07:00
parent e1abdd58a8
commit d57a1c7790
16 changed files with 20407 additions and 3335 deletions
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1
#auto_saved_files# Normal file
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/home/edith/Documents/ece223-project/_autosave-ece223_project.kicad_sch

259
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49
TL072.sub Normal file
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* TL072 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08
* (REV N/A) SUPPLY VOLTAGE: +/-15V
* CONNECTIONS: NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OUTPUT
* | | | | |
.SUBCKT TL072 1 2 3 4 5
*
C1 11 12 3.498E-12
C2 6 7 15.00E-12
DC 5 53 DX
DE 54 5 DX
DLP 90 91 DX
DLN 92 90 DX
DP 4 3 DX
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
FB 7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6
GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195.0E-6
HLIM 90 0 VLIM 1K
J1 11 2 10 JX
J2 12 1 10 JX
R2 6 9 100.0E3
RD1 4 11 3.536E3
RD2 4 12 3.536E3
RO1 8 5 150
RO2 7 99 150
RP 3 4 2.143E3
RSS 10 99 1.026E6
VB 9 0 DC 0
VC 3 53 DC 2.200
VE 54 4 DC 2.200
VLIM 7 8 DC 0
VLP 91 0 DC 25
VLN 0 92 DC 25
.MODEL DX D(IS=800.0E-18)
.MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1)
.ENDS
.SUBCKT TL072I 1OUT 1IN- 1IN+ VCC- 2IN+ 2IN- 2OUT VCC+
X1 1IN+ 1IN- VCC+ VCC- 1OUT TL072
X2 2IN+ 2IN- VCC+ VCC- 2OUT TL072
.ENDS TL072I

125
ada4692.sub Normal file
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* ADA4692 SPICE Macro-model
* Description: Amplifier
* Generic Desc: 2.7/5V, CMOS, OP, Low Noise, SD, 4X
* Developed by: HH / ADSJ
* Revision History: 08/10/2012 - Updated to new header style
* 1.0 (07/2009)
* Copyright 2009, 2012 by Analog Devices
*
* Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spiceModels/license/spice_general.html for License Statement. Use of this model
* indicates your acceptance of the terms and provisions in the License Statement.
*
* BEGIN Notes:
* Not Modeled:
*
* Parameters modeled include:
* VSY=5V, T=25°C
*
* END Notes
*
* Node Assignments
* noninverting input
* | inverting input
* | | positive supply
* | | | negative supply
* | | | | output
* | | | | |
* | | | | |
.SUBCKT ADA4692 1 2 99 50 45
*
* INPUT STAGE
*
M1 4 7 8 99 PIX L=1E-6 W=2.807E-04
M2 6 2 8 99 PIX L=1E-6 W=2.807E-04
RD1 4 50 1.333E+04
RD2 6 50 1.333E+04
C1 4 6 5.900E-13
I1 99 8 3.000E-05
V1 99 9 1.098E-00
D1 8 9 DX
EOS 7 1 POLY(4) (73,98) (22,98) (81,98) (83,98) 5.00E-04 1 1 1 1
IOS 1 2 5.00E-13
*
* INTERNAL VOLTAGE REFERENCE
*
EREF 98 0 POLY(2) (99,0) (50,0) 0 0.5 0.5
EVP 97 98 (99,50) 0.5
EVN 51 98 (50,99) 0.5
*
* GAIN STAGE
*
G1 98 30 POLY(1) (4,6) 0 4.599E-04
R1 30 98 1.000E+06
RZ 45 31 3.429E+02
CF 30 31 1.115E-10
V3 32 30 0.2225E+00
V4 30 33 0.4087E+00
D3 32 97 DX
D4 51 33 DX
*
*CMRR
*
E1 72 98 POLY(2) (1,98) (2,98) 0 2.667E-05 2.667E-05
R10 72 73 1.592E+00
R20 73 98 5.305E-03
C10 72 73 1.000E-06
*
* PSRR
*
EPSY 21 98 POLY(1) (99,50) -1.913E-00 3.826E-01
RPS1 21 22 6.631E+02
RPS2 22 98 2.449E-02
CPS1 21 22 1.000E-06
*
* VOLTAGE NOISE REFERENCE OF 13nV/rt(Hz)
*
VN1 80 98 0
RN1 80 98 22.5E-03
HN 81 98 VN1 1.33E+01
RN2 81 98 1
*
* FLICKER NOISE CORNER = 1000 Hz
*
DFN 82 98 DNOISE
VFN 82 98 DC 0.6551
HFN 83 98 POLY(1) VFN 1.00E-03 1.00E+00
RFN 83 98 1
*
* OUTPUT STAGE
*
M5 45 46 99 99 POX L=1.00E-6 W=1.231E-03
M6 45 47 50 50 NOX L=1.00E-6 W=3.792E-04
EG1 99 46 POLY(1) (98,30) 7.964E-01 1
EG2 47 50 POLY(1) (30,98) 6.869E-01 1
*
GSY 99 50 POLY(1) (99,50) 63.95E-06 5.937E-06
*
* MODELS
*
.MODEL POX PMOS (LEVEL=2,KP=1.00E-05,VTO=-0.7,LAMBDA=0.05, RB=1E+00)
.MODEL NOX NMOS (LEVEL=2,KP=4.00E-05,VTO=+0.6,LAMBDA=0.035, RB=1E+00)
.MODEL PIX PMOS (LEVEL=2,KP=4.00E-05,VTO=-0.5,LAMBDA=0.03,RB=1E-02)
*.MODEL NIX NMOS (LEVEL=2,KP=4.00E-05,VTO=0.5, LAMBDA=0.03,RB=1E+00)
.MODEL DX D(IS=1E-14,RS=0.1)
.MODEL DNOISE D(IS=1E-14,RS=0,KF=3.6E-11)
*
.ENDS ADA4692
*
*$
* noninverting input
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* | | | negative supply
* | | | | output
* | | | | |
* | | | | |
*SUBCKT ADA4692 1 2 99 50 45
.SUBCKT ADA4692-2 AOUT AIN- AIN+ V- BIN+ BIN- BOUT V+
X1 AIN+ AIN- V+ V- AOUT ADA4692
X2 BIN+ BIN- V+ V- BOUT ADA4692
.ends

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(pin "5"
(uuid "658addb7-8557-4d3d-b9de-1cda143928f2")
(uuid "5fb507ad-fa16-4855-9ab8-c96829efab1f")
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(pin "11"
(uuid "bbb76668-a696-4f17-a42c-96f1401a31f2")
(pin "3"
(uuid "9d36396e-fd95-4542-bb3e-c47c141b2080")
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(pin "12"
(uuid "c4f2bf66-10bb-43ff-ad9b-b1c3c302eeae")
(pin "1"
(uuid "01b42cf3-cf6b-4714-961b-5eb616e8aea9")
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(pin "6"
(uuid "854e5dd5-d3e1-4776-b484-ad693e61c0be")
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(pin "7"
(uuid "33c9882a-934b-41f6-b91c-b4b72b670022")
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(pin "8"
(uuid "7095b578-3b86-4a9c-ab9d-c355a4252925")
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(instances
(project "ece223_project"
(project ""
(path "/3a60b8c4-9b6a-45e3-8d5f-2fa80fee2396/92a045e3-bee5-40f5-b5ce-8fe433234af4"
(reference "U1")
(unit 4)
(reference "U2")
(unit 1)
)
)
)
@ -1317,7 +1164,7 @@
(dnp no)
(fields_autoplaced yes)
(uuid "dfcb5527-2e40-475b-a24f-7337b29c79f9")
(property "Reference" "R13"
(property "Reference" "R11"
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(property "Footprint" ""
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(at 59.944 52.324 90)
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(reference "R13")
(reference "R11")
(unit 1)
)
)

1396
led_gain.kicad_sch
View File

File diff suppressed because it is too large Load Diff

229
lm2901.lib Normal file
View File

@ -0,0 +1,229 @@
*source LM2901
* PSpice Model Editor - Version 17.4.0
*$
*LM2901
*****************************************************************************
* (C) Copyright 2022 Texas Instruments Incorporated. All rights reserved.
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of
** merchantability or fitness for a particular purpose. The model is
** provided solely on an "as is" basis. The entire risk as to its quality
** and performance is with the customer.
*****************************************************************************
*
* This model is subject to change without notice. Texas Instruments
* Incorporated is not responsible for updating this model
*
*****************************************************************************
*
** Released by: Texas Instruments Inc.
* Part: LM2901
* Date: 1/31/2023
* Model Type: All In One
* Simulator: PSPICE
* Simulator Version: 17.4.0.p001
* EVM Order Number: N/A
* EVM Users Guide: N/A
* Datasheet: SLCS006V
* Model Version: 1.0
*
*****************************************************************************
*
* Updates:
*
* Version 1.0 : Release to Web
*
*****************************************************************************
* Model Notes:
* Modeled parameters:
* Supply Voltage Ranges
* Input Voltage Range
* Supply Current
* Input Bias Currents
* Typical Offset Voltage
* Propagation Delay
* Error Conditions:
* If the input goes beyond the recommended input voltage range, the output will float to mid supply
* If the supplies goes beyond the recommended supply voltage ranges, the output will float to mid supply
* The real device will NOT do this.
*
******************************************************************************
* source LM2901
.SUBCKT LM2901 IN+ IN- Vcc GND OUT
R_RIS N859943 VCC 1u TC=0,0
I_IBN IN- GND DC -3.5n
X_U5 N859997 GND N860457 0 V+_BUFFER V-_BUFFER VCC N860405 OUT Output_Stage
X_U4 N860391 N860397 Prop_Delay
X_U2 IN-BUFF IN+BUFF N860457 V+_BUFFER V-_BUFFER INPUTRANGE
C_CINNL GND IN- 0.5p TC=0,0
X_U6 GND V+_BUFFER V-_BUFFER VCC Supply_Buffer
X_U1 IN+ IN+BUFF IN- IN-BUFF Input_Buffer
I_IBP IN+ GND DC -3.5n
C_CINPH IN+ VCC 0.5p TC=0,0
X_U7 N859997 0 V+_BUFFER V-_BUFFER Supply_Enable
E_E1 N860405 V-_BUFFER N860397 V-_BUFFER 2
I_IS N859943 GND DC 275u
C_CINPL GND IN+ 0.5p TC=0,0
C_CINNH IN- VCC 0.5p TC=0,0
X_U3 N860177 IN-BUFF N860391 V+_BUFFER V-_BUFFER N860477 HPA_COMPHYS
V_VOS N860177 IN+BUFF 0.37m
V_VHYST N860477 0 0
X_DESD3 GND IN+ DESD PARAMS: AREA=1.0
X_DESD5 GND IN- DESD PARAMS: AREA=1.0
.ENDS
.SUBCKT Supply_Enable EN POR V+_BUFFER V-_BUFFER
V_VS_MIN_SET N780252 0 1.99
X_U13 V+_BUFFER V-_BUFFER N780066 1V 0 Difference
X_U16 N780086 POR EN 1V 0 ORGATE
V_VS_MAX_SET N779976 0 36.01
V_VLOGIC 1V 0 1
X_U15 N780252 N780066 POR 1V 0 VCC_Range
X_U5 N780066 N779976 N780086 1V 0 VCC_Range
.ENDS
.SUBCKT Input_Buffer IN+ IN+_BUFF IN- IN-_BUFF
X_U1 IN+ IN- IN+_BUFF IN-_BUFF SUPPLY_BUFFER1
.ENDS
.SUBCKT Supply_Buffer GND V+_BUFFER V-_BUFFER Vcc
X_U1 VCC GND V+_BUFFER V-_BUFFER SUPPLY_BUFFER1
.ENDS
.SUBCKT INPUTRANGE INN INP INRANGE V+_BUFFER V-_BUFFER
V_VCMNN N20539 V-_BUFFER -110m
X_U1 N20155 INP N20826 V+_BUFFER V-_BUFFER VINRANGE_393
X_U21 N202710 INN N20833 V+_BUFFER V-_BUFFER VINRANGE_393
X_U22 INP N20415 N20840 V+_BUFFER V-_BUFFER VINRANGE_393
X_U23 INN N20539 N20531 V+_BUFFER V-_BUFFER VINRANGE_393
V_VCMPN N202710 V+_BUFFER -2
V_VCMNP N20415 V-_BUFFER -110m
V_VCMPP N20155 V+_BUFFER -2
X_U24 N20826 N20833 N20840 N20531 INRANGE V+_BUFFER V-_BUFFER 4ORGATE
.ENDS
.SUBCKT Prop_Delay VIN VOUT
R_RS N03175 VIN 50 TC=0,0
T_TPD N03175 0 VOUT 0 Z0=50 TD=1u
R_RT 0 VOUT 50 TC=0,0
.ENDS
.SUBCKT Output_Stage EN GND IN_RANGE POR V+_BUFFER V-_BUFFER Vcc VIN VOUT
X_SVOL N774212 N774290 GND N850209 Output_Stage_SVOL
X_U7 MID V+_BUFFER V-_BUFFER MID_SUPPLY
C_COUTL GND VOUT 0.5p TC=0,0
X_SMID CONTROL_MID 0 N778484 MID Output_Stage_SMID
X_U9 CONTROL_HIZ N789513 1V 0 INVERTER
X_U3 VIN N774212 V+_BUFFER V-_BUFFER VCC N774290 DIGLEVSHIFT
C_COUTH VOUT VCC 0.5p TC=0,0
X_SHIZ CONTROL_HIZ 0 N778484 N778496 Output_Stage_SHIZ
V_VLOGIC 1V 0 1
V_V1 VCC N774290 1
X_U10 N789513 POR CONTROL_MID 1V 0 ORGATE
R_ROUTL N850209 N778496 60 TC=0,0
X_U8 POR IN_RANGE EN EN CONTROL_HIZ 1V 0 4ORGATE
L_L1 N778484 VOUT 1n
.ENDS
.subckt Output_Stage_SVOL 1 2 3 4
S_SVOL 3 4 1 2 _SVOL
RS_SVOL 1 2 1G
.MODEL _SVOL VSWITCH Roff=1e12 Ron=1.0 Voff=1 Von=0
.ends Output_Stage_SVOL
.subckt Output_Stage_SMID 1 2 3 4
S_SMID 3 4 1 2 _SMID
RS_SMID 1 2 1G
.MODEL _SMID VSWITCH Roff=1e12 Ron=1.0 Voff=1 Von=0
.ends Output_Stage_SMID
.subckt Output_Stage_SHIZ 1 2 3 4
S_SHIZ 3 4 1 2 _SHIZ
RS_SHIZ 1 2 1G
.MODEL _SHIZ VSWITCH Roff=1e12 Ron=1.0 Voff=1 Von=0
.ends Output_Stage_SHIZ
.SUBCKT HPA_COMPHYS INP INN OUT_OUT VDD VSS VHYS
EVMID VMID 0 VALUE = { ( V(VDD) + V(VSS) )/2 }
EVH VH 0 VALUE = { ( V(VHYS)/2) }
EINNNEW INNNEW 0 VALUE = { IF( ( V(OUT_OUT) < V(VMID) ),(V(INN) + (V(VH))),( V(INN) - V(VH) ) ) }
EOUT OUT 0 VALUE = { IF( ( V(INP) > V(INNNEW) ), V(VDD), V(VSS) ) }
R1 OUT OUT_OUT 1
C1 OUT_OUT 0 1e-12
.ENDS
*$
.SUBCKT DIGLEVSHIFT 1 2 VDD_OLD VSS_OLD VDD_NEW VSS_NEW
*E1 3 0 VALUE = { IF( V(1) < (V(VDD_OLD)+V(VSS_OLD))/2, V(VSS_NEW), V(VDD_NEW) ) }
E1 3 0 VALUE = { IF( V(1) < 1, V(VSS_NEW), V(VDD_NEW) ) }
R1 3 2 1
*C1 2 0 1e-12
.ENDS
*$
.SUBCKT INVERTER 1 2 VDD VSS
E2 2 0 VALUE = { IF( V(1)> (V(VDD)+V(VSS))/2, V(VSS), V(VDD) ) }
C1 1 0 1e-12
.ENDS
*$
.SUBCKT MID_SUPPLY OUT VDD VSS
EVMID VMID 0 VALUE = { ( V(VDD) + V(VSS) )/2 }
EOUT OUT 0 VALUE = {V(VMID)}
.ENDS
*$
.SUBCKT ORGATE 1 2 3 VDD VSS
E1 4 0 VALUE = { IF( ((V(1)< (V(VDD)+V(VSS))/2 ) & (V(2)< (V(VDD)+V(VSS))/2 )), V(VSS), V(VDD) ) }
R1 4 3 1
C1 3 0 1e-12
.ENDS
*$
.SUBCKT Difference 1 2 OUT VDD VSS
EOUT OUT1 0 VALUE = { V(1)- V(2)}
R1 OUT1 OUT 1
*C1 OUT 0 1e-12
.ENDS
*$
.SUBCKT SUPPLY_BUFFER1 1 2 VDD_NEW VSS_NEW
EVDD_NEW VDD_NEW 0 VALUE = {V(1)}
EVSS_NEW VSS_NEW 0 VALUE = {V(2)}
.ENDS
*$
.SUBCKT VCC_Range 1 2 OUT VDD VSS
EOUT OUT2 0 VALUE = { IF( ( V(1) >= V(2) ), V(VDD), V(VSS) ) }
R1 OUT OUT2 1
C1 OUT 0 1e-12
.ENDS
*$
.SUBCKT VINRANGE_393 1 2 OUT VDD VSS
EOUT OUT2 0 VALUE = { IF( ( V(1) >= V(2) ), V(VSS), V(VDD) ) }
R1 OUT2 OUT 1
C1 OUT 0 1e-12
.ENDS
*$
.SUBCKT 4ORGATE 1 2 3 4 5 VDD VSS
E1 6 0 VALUE = { IF( ((V(1)> (V(VDD)+V(VSS))/2 ) | (V(2)> (V(VDD)+V(VSS))/2 ) | (V(3)> (V(VDD)+V(VSS))/2 ) | (V(4)> (V(VDD)+V(VSS))/2 )), V(VDD), V(VSS) ) }
R1 5 6 1
.ENDS
*$
.subckt DESD AN CAT
+ params:
+ AREA=1.0
+ IS=10f
+ RS=5
+ BV=100
D_DESD AN CAT model22 {area}
.model model22 d
+ is={IS}
+ rs={RS}
+ bv={BV}
.ends DESD
.SUBCKT LM339 1OUT 2OUT VCC 2IN- 2IN+ 1IN- 1IN+ 3IN- 3IN+ 4IN- 4IN+ GND 4OUT 3OUT
X1 1IN+ 1IN- VCC GND 1OUT LM2901
X2 2IN+ 2IN- VCC GND 2OUT LM2901
X3 3IN+ 3IN- VCC GND 3OUT LM2901
X4 4IN+ 4IN- VCC GND 4OUT LM2901
.ENDS LM339

306
rail_gen.kicad_sch
View File

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(at 40.64 49.5299 0)
(effects
(font
@ -2468,7 +2551,7 @@
(justify left)
)
)
(property "Footprint" ""
(property "Footprint" "Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder"
(at 37.7952 54.61 0)
(effects
(font
@ -2504,7 +2587,7 @@
(instances
(project ""
(path "/3a60b8c4-9b6a-45e3-8d5f-2fa80fee2396/7683adc3-3937-403f-8f34-7becfe72007f"
(reference "C6")
(reference "C1")
(unit 1)
)
)
@ -2518,9 +2601,8 @@
(in_bom yes)
(on_board yes)
(dnp no)
(fields_autoplaced yes)
(uuid "c1fe2a8e-bc15-4e37-83b8-644d55f60335")
(property "Reference" "R7"
(property "Reference" "R8"
(at 111.76 41.9099 0)
(effects
(font
@ -2529,7 +2611,7 @@
(justify left)
)
)
(property "Value" "560k"
(property "Value" "240k"
(at 111.76 44.4499 0)
(effects
(font
@ -2538,7 +2620,7 @@
(justify left)
)
)
(property "Footprint" ""
(property "Footprint" "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder"
(at 110.236 43.434 90)
(effects
(font
@ -2574,7 +2656,7 @@
(instances
(project ""
(path "/3a60b8c4-9b6a-45e3-8d5f-2fa80fee2396/7683adc3-3937-403f-8f34-7becfe72007f"
(reference "R7")
(reference "R8")
(unit 1)
)
)
@ -2606,7 +2688,7 @@
)
)
)
(property "Footprint" "Package_TO_SOT_SMD:SOT-23-5"
(property "Footprint" "Package_TO_SOT_SMD:SOT-23-5_HandSoldering"
(at 62.23 58.42 0)
(effects
(font
@ -2698,8 +2780,8 @@
(at 74.93 49.53 0)
(unit 1)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(in_bom no)
(on_board no)
(dnp no)
(fields_autoplaced yes)
(uuid "dc38a449-dc24-4d00-ac79-c5b32f889c29")

4
sym-lib-table Normal file
View File

@ -0,0 +1,4 @@
(sym_lib_table
(version 7)
(lib (name "Custom")(type "KiCad")(uri "${KIPRJMOD}/Custom.kicad_sym")(options "")(descr ""))
)

1
~ece223_project.kicad_sch.lck Normal file
View File

@ -0,0 +1 @@
{"hostname":"edith-wide","username":"edith"}