230 lines
7.6 KiB
Plaintext
230 lines
7.6 KiB
Plaintext
*source LM2901
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* PSpice Model Editor - Version 17.4.0
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*$
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*LM2901
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*****************************************************************************
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* (C) Copyright 2022 Texas Instruments Incorporated. All rights reserved.
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*****************************************************************************
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** This model is designed as an aid for customers of Texas Instruments.
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** TI and its licensors and suppliers make no warranties, either expressed
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** or implied, with respect to this model, including the warranties of
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** merchantability or fitness for a particular purpose. The model is
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** provided solely on an "as is" basis. The entire risk as to its quality
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** and performance is with the customer.
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*****************************************************************************
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*
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* This model is subject to change without notice. Texas Instruments
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* Incorporated is not responsible for updating this model
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*
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*****************************************************************************
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*
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** Released by: Texas Instruments Inc.
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* Part: LM2901
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* Date: 1/31/2023
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* Model Type: All In One
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* Simulator: PSPICE
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* Simulator Version: 17.4.0.p001
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* EVM Order Number: N/A
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* EVM Users Guide: N/A
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* Datasheet: SLCS006V
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* Model Version: 1.0
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*
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*****************************************************************************
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*
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* Updates:
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*
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* Version 1.0 : Release to Web
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*
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*****************************************************************************
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* Model Notes:
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* Modeled parameters:
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* Supply Voltage Ranges
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* Input Voltage Range
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* Supply Current
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* Input Bias Currents
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* Typical Offset Voltage
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* Propagation Delay
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* Error Conditions:
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* If the input goes beyond the recommended input voltage range, the output will float to mid supply
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* If the supplies goes beyond the recommended supply voltage ranges, the output will float to mid supply
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* The real device will NOT do this.
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*
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******************************************************************************
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* source LM2901
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.SUBCKT LM2901 IN+ IN- Vcc GND OUT
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R_RIS N859943 VCC 1u TC=0,0
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I_IBN IN- GND DC -3.5n
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X_U5 N859997 GND N860457 0 V+_BUFFER V-_BUFFER VCC N860405 OUT Output_Stage
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X_U4 N860391 N860397 Prop_Delay
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X_U2 IN-BUFF IN+BUFF N860457 V+_BUFFER V-_BUFFER INPUTRANGE
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C_CINNL GND IN- 0.5p TC=0,0
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X_U6 GND V+_BUFFER V-_BUFFER VCC Supply_Buffer
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X_U1 IN+ IN+BUFF IN- IN-BUFF Input_Buffer
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I_IBP IN+ GND DC -3.5n
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C_CINPH IN+ VCC 0.5p TC=0,0
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X_U7 N859997 0 V+_BUFFER V-_BUFFER Supply_Enable
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E_E1 N860405 V-_BUFFER N860397 V-_BUFFER 2
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I_IS N859943 GND DC 275u
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C_CINPL GND IN+ 0.5p TC=0,0
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C_CINNH IN- VCC 0.5p TC=0,0
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X_U3 N860177 IN-BUFF N860391 V+_BUFFER V-_BUFFER N860477 HPA_COMPHYS
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V_VOS N860177 IN+BUFF 0.37m
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V_VHYST N860477 0 0
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X_DESD3 GND IN+ DESD PARAMS: AREA=1.0
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X_DESD5 GND IN- DESD PARAMS: AREA=1.0
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.ENDS
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.SUBCKT Supply_Enable EN POR V+_BUFFER V-_BUFFER
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V_VS_MIN_SET N780252 0 1.99
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X_U13 V+_BUFFER V-_BUFFER N780066 1V 0 Difference
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X_U16 N780086 POR EN 1V 0 ORGATE
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V_VS_MAX_SET N779976 0 36.01
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V_VLOGIC 1V 0 1
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X_U15 N780252 N780066 POR 1V 0 VCC_Range
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X_U5 N780066 N779976 N780086 1V 0 VCC_Range
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.ENDS
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.SUBCKT Input_Buffer IN+ IN+_BUFF IN- IN-_BUFF
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X_U1 IN+ IN- IN+_BUFF IN-_BUFF SUPPLY_BUFFER1
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.ENDS
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.SUBCKT Supply_Buffer GND V+_BUFFER V-_BUFFER Vcc
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X_U1 VCC GND V+_BUFFER V-_BUFFER SUPPLY_BUFFER1
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.ENDS
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.SUBCKT INPUTRANGE INN INP INRANGE V+_BUFFER V-_BUFFER
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V_VCMNN N20539 V-_BUFFER -110m
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X_U1 N20155 INP N20826 V+_BUFFER V-_BUFFER VINRANGE_393
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X_U21 N202710 INN N20833 V+_BUFFER V-_BUFFER VINRANGE_393
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X_U22 INP N20415 N20840 V+_BUFFER V-_BUFFER VINRANGE_393
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X_U23 INN N20539 N20531 V+_BUFFER V-_BUFFER VINRANGE_393
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V_VCMPN N202710 V+_BUFFER -2
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V_VCMNP N20415 V-_BUFFER -110m
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V_VCMPP N20155 V+_BUFFER -2
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X_U24 N20826 N20833 N20840 N20531 INRANGE V+_BUFFER V-_BUFFER 4ORGATE
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.ENDS
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.SUBCKT Prop_Delay VIN VOUT
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R_RS N03175 VIN 50 TC=0,0
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T_TPD N03175 0 VOUT 0 Z0=50 TD=1u
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R_RT 0 VOUT 50 TC=0,0
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.ENDS
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.SUBCKT Output_Stage EN GND IN_RANGE POR V+_BUFFER V-_BUFFER Vcc VIN VOUT
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X_SVOL N774212 N774290 GND N850209 Output_Stage_SVOL
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X_U7 MID V+_BUFFER V-_BUFFER MID_SUPPLY
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C_COUTL GND VOUT 0.5p TC=0,0
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X_SMID CONTROL_MID 0 N778484 MID Output_Stage_SMID
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X_U9 CONTROL_HIZ N789513 1V 0 INVERTER
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X_U3 VIN N774212 V+_BUFFER V-_BUFFER VCC N774290 DIGLEVSHIFT
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C_COUTH VOUT VCC 0.5p TC=0,0
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X_SHIZ CONTROL_HIZ 0 N778484 N778496 Output_Stage_SHIZ
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V_VLOGIC 1V 0 1
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V_V1 VCC N774290 1
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X_U10 N789513 POR CONTROL_MID 1V 0 ORGATE
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R_ROUTL N850209 N778496 60 TC=0,0
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X_U8 POR IN_RANGE EN EN CONTROL_HIZ 1V 0 4ORGATE
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L_L1 N778484 VOUT 1n
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.ENDS
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.subckt Output_Stage_SVOL 1 2 3 4
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S_SVOL 3 4 1 2 _SVOL
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RS_SVOL 1 2 1G
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.MODEL _SVOL VSWITCH Roff=1e12 Ron=1.0 Voff=1 Von=0
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.ends Output_Stage_SVOL
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.subckt Output_Stage_SMID 1 2 3 4
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S_SMID 3 4 1 2 _SMID
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RS_SMID 1 2 1G
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.MODEL _SMID VSWITCH Roff=1e12 Ron=1.0 Voff=1 Von=0
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.ends Output_Stage_SMID
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.subckt Output_Stage_SHIZ 1 2 3 4
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S_SHIZ 3 4 1 2 _SHIZ
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RS_SHIZ 1 2 1G
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.MODEL _SHIZ VSWITCH Roff=1e12 Ron=1.0 Voff=1 Von=0
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.ends Output_Stage_SHIZ
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.SUBCKT HPA_COMPHYS INP INN OUT_OUT VDD VSS VHYS
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EVMID VMID 0 VALUE = { ( V(VDD) + V(VSS) )/2 }
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EVH VH 0 VALUE = { ( V(VHYS)/2) }
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EINNNEW INNNEW 0 VALUE = { IF( ( V(OUT_OUT) < V(VMID) ),(V(INN) + (V(VH))),( V(INN) - V(VH) ) ) }
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EOUT OUT 0 VALUE = { IF( ( V(INP) > V(INNNEW) ), V(VDD), V(VSS) ) }
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R1 OUT OUT_OUT 1
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C1 OUT_OUT 0 1e-12
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.ENDS
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*$
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.SUBCKT DIGLEVSHIFT 1 2 VDD_OLD VSS_OLD VDD_NEW VSS_NEW
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*E1 3 0 VALUE = { IF( V(1) < (V(VDD_OLD)+V(VSS_OLD))/2, V(VSS_NEW), V(VDD_NEW) ) }
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E1 3 0 VALUE = { IF( V(1) < 1, V(VSS_NEW), V(VDD_NEW) ) }
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R1 3 2 1
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*C1 2 0 1e-12
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.ENDS
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*$
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.SUBCKT INVERTER 1 2 VDD VSS
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E2 2 0 VALUE = { IF( V(1)> (V(VDD)+V(VSS))/2, V(VSS), V(VDD) ) }
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C1 1 0 1e-12
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.ENDS
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*$
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.SUBCKT MID_SUPPLY OUT VDD VSS
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EVMID VMID 0 VALUE = { ( V(VDD) + V(VSS) )/2 }
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EOUT OUT 0 VALUE = {V(VMID)}
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.ENDS
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*$
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.SUBCKT ORGATE 1 2 3 VDD VSS
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E1 4 0 VALUE = { IF( ((V(1)< (V(VDD)+V(VSS))/2 ) & (V(2)< (V(VDD)+V(VSS))/2 )), V(VSS), V(VDD) ) }
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R1 4 3 1
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C1 3 0 1e-12
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.ENDS
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*$
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.SUBCKT Difference 1 2 OUT VDD VSS
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EOUT OUT1 0 VALUE = { V(1)- V(2)}
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R1 OUT1 OUT 1
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*C1 OUT 0 1e-12
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.ENDS
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*$
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.SUBCKT SUPPLY_BUFFER1 1 2 VDD_NEW VSS_NEW
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EVDD_NEW VDD_NEW 0 VALUE = {V(1)}
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EVSS_NEW VSS_NEW 0 VALUE = {V(2)}
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.ENDS
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*$
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.SUBCKT VCC_Range 1 2 OUT VDD VSS
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EOUT OUT2 0 VALUE = { IF( ( V(1) >= V(2) ), V(VDD), V(VSS) ) }
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R1 OUT OUT2 1
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C1 OUT 0 1e-12
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.ENDS
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*$
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.SUBCKT VINRANGE_393 1 2 OUT VDD VSS
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EOUT OUT2 0 VALUE = { IF( ( V(1) >= V(2) ), V(VSS), V(VDD) ) }
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R1 OUT2 OUT 1
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C1 OUT 0 1e-12
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.ENDS
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*$
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.SUBCKT 4ORGATE 1 2 3 4 5 VDD VSS
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E1 6 0 VALUE = { IF( ((V(1)> (V(VDD)+V(VSS))/2 ) | (V(2)> (V(VDD)+V(VSS))/2 ) | (V(3)> (V(VDD)+V(VSS))/2 ) | (V(4)> (V(VDD)+V(VSS))/2 )), V(VDD), V(VSS) ) }
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R1 5 6 1
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.ENDS
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*$
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.subckt DESD AN CAT
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+ params:
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+ AREA=1.0
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+ IS=10f
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+ RS=5
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+ BV=100
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D_DESD AN CAT model22 {area}
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.model model22 d
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+ is={IS}
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+ rs={RS}
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+ bv={BV}
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.ends DESD
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.SUBCKT LM339 1OUT 2OUT VCC 2IN- 2IN+ 1IN- 1IN+ 3IN- 3IN+ 4IN- 4IN+ GND 4OUT 3OUT
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X1 1IN+ 1IN- VCC GND 1OUT LM2901
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X2 2IN+ 2IN- VCC GND 2OUT LM2901
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X3 3IN+ 3IN- VCC GND 3OUT LM2901
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X4 4IN+ 4IN- VCC GND 4OUT LM2901
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.ENDS LM339
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